Vaibhav Kashera supervised by Dr. Venkata Suresh Reddy Purini received his B.Tech – Dual Degree in  Computer Science and Engineering (CSE). Here’s a summary of his research work on Managing High-Speed Order Books Using Hybrid Binary-Linear Search Data Structures in FPGAs:

The popularity of High-Frequency Trading (HFT) or algorithmic trading has surged in the last ten years, largely due to the exponential increase in computing power. Despite the evolution and optimization of software solutions tailored for HFT, challenges persist, notably due to inefficiencies associated with network stack overheads and the separation between kernel and user spaces. A pivotal element in any HFT framework is the construction of the order book, which serves as a critical snapshot of the market, underpinning trading strategies and executions. In this thesis, we introduce an innovative, simple linear data structure designed for efficient order book tracking, coupled with a hybrid binary-linear search algorithm. This algorithm is specifically engineered to dynamically maintain the top bid and ask offers, which is crucial for reflecting the market depth on Field-Programmable Gate Arrays (FPGAs). This methodology is premised on the understanding that a significant portion of trading activities concentrates at the top levels of the bid and ask prices. Through design, analysis and experimentation, we demonstrate that our simple approach is scalable and practical, outperforming previous methods.

 June 2024