Soumya Tapse received her MS in Electronics and Communication Engineering (ECE). Her research work was supervised by Dr. Srivatsava Jandhyala.
Here’s a summary of Soumya’s M.S thesis, Analog and analog-mixed-signal system-on-a-chip circuits for internet of things as explained by her:
Recent advances in the semiconductor industry for the internet of things have increased the demand for novel, fast and robust circuits. The thirst for high-processing ICs is ever increasing. This has pushed the demand for high data rate in wireless and wireline communication systems in the multi-Gbps range. For high-speed transmission of data, there arises a need for high-speed on-chip clocking circuits making the use of Phase-Locked Loops (PLLs) crucial. Phase-Locked Loops are used for synchronization, synthesis of clock, and jitter reduction in mobile or wireless communications. For demodulating a signal and recovering it to its original input signal, the PLL circuit is used. PLL has wide application in high frequency ranges (Giga Hertz) as crystal oscillators have a limited operating frequency range in the order of Mega Hertz.
The current reference is an indispensable circuit in analog, digital, and poser electronic systems. Since it is easy to implement a voltage reference by the bandgap circuit, current references are derived from voltage references by voltage to current conversion. However, this conversion may take more silicon area since it contains transistors, operational amplifier, and resistors.
In this thesis, we present a robust on-chip clock generator circuit using a power efficient phase frequency detector and a low current mismatch dual adaptive regulated charge pump. Another technique for charge pump has been proposed to implement PLL using Dynamic Voltage Frequency Scaling (DVFS) scheme. To manifest the effectiveness of this DVFS, a 10-bit Successive Approximation ADC (SAR ADC) is built. The current reference circuit is proposed which is robust to process, temperature, and voltage variations. Ring oscillator and temperature sensor are built using the proposed current reference circuit. The simulations of all circuits are done by using the Cadence Virtuoso tool in the l80nma UMC MPW RF process.