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Neural Networks on Chip Design from the Users perspective by Dr. Yu Wang

Dr. Yu Wang, Tsinghua University gave a talk on  Neural Networks on Chip Design from the Users perspective on 7 January.

To apply neural networks to different applications, various customized hardware architectures on CMOS and NVM were proposed in the past few years to boost the energy efficiency of deep learning inference processing.  After their research’s groups past effort on Deep learning Processing Unit (DPU) design on FPGA in Tsinghua and Deephi, they started thinking about more features needed from the users’ perspective, i.e. interrupt and virtualization, reliability and security. In his talk Dr. Yu Wang proposed some preliminary solutions for these features.

Dr. Yu Wang received his B.S degree in 2002 and Ph.D degree (with honor) in 2007 from Tsinghua University, Beijing, China. He is currently a Tenured Professor with the Department of Electronic Engineering, Tsinghua University. His research interests include application-specific hardware computing, parallel circuit analysis, and power/reliability aware system design methodology. Dr. Wang has authored and coauthored over 200 papers in refereed journals and conferences. He has received Best Paper Award in ASPDAC 2019, FPGA 2017, NVMSA17, ISVLSI 2012, and Best Poster Award in HEART 2012 with 10 Best Paper Nominations. He is a recipient of  DAC Under-40 Innovator Award in 2018 and IBM X10 Faculty Award in 2010. He is the co-founder of Deephi Tech (acquired by Xilinx), which is a leading deep learning computing platform provider.