Dr. Zia Abbas and his students Shameer Basha (Ph.D), Bhartipudi Sahishnavi (MS), Arnab Dey (MS), Samriddhi Agarwal (MS), Bharadwaj S. (DD), Sampath (Honours), Ashfakh Ali, Abhishek Pullela, Arpan Jain have published the following papers in IEEE International Symposium on Circuits and Systems (ISCAS), held at Monterey, USA from 21 May – 25 May.
- A 7nW, 1kHz, -40-170oC Relaxation Oscillator Using Switch Leakage Cancellation Scheme for Low-Power High-Temperature IoT Systems – Ashfakh Ali, Abhishek Pullela, Arpan Jain, Zia Abbas, Inhee Lee. Research work as explained by the authors:
This paper proposes a low-power relaxation oscillator for low-power high-temperature IoT systems. It generates a 959 Hz clock signal from -40 to 170 °C, consuming 6.75 nW at 0.65 V. A proposed switch-leakage compensation scheme nullifies the effects of body diode and subthreshold leakages on oscillator output frequency at high temperatures, thereby obtaining a wide operating temperature range. The oscillator implemented in a 180 nm CMOS process achieves a temperature coefficient of 40 ppm/°C from -40 to 170 °C at 0.65 V and a line sensitivity of 0.5 %/V from 0.65 to 2.4 V at room temperature, in simulation. Compared with state-of-the-art sub-μW oscillators, this circuit obtains the highest operating temperature and the maximum temperature range.
- An 18.5nW, 62.9dB PSRR, Switched-Capacitor Bandgap Voltage Reference using Low Power Clock Generator Circuit for Biomedical Applications – Samriddhi Agarwal, Shameer Basha, Naveen Dasari, Inhee Lee, and Zia Abbas. Research work as explained by the authors:
This paper proposes a switched-capacitor network (SCN) based fractional bandgap voltage reference (BGR) circuit designed in a 180nm CMOS process to achieve high accuracy and low power consumption for implantable biomedical applications.
The design proposes a VEB generator that employs a 2x charge pump and an improved SCN to generate a temperature independent reference voltage (VREF ). A low-power clock generator circuit is proposed, which reduces the leakage current by 37% compared to previous works, thereby reducing the circuit’s power consumption to 18.5nW at typical conditions. The design works from a supply voltage of 0.5V and has a TC of 74.5ppm/◦C over a temperature range of 0-80◦C. The PSRR of the circuit is -62.9dB at 100Hz. Based on the Monte Carlo simulations of 500 samples, we obtain an untrimmed 3σ/μ of 2.6%. The design occupies an active area of 0.027mm2.
- A 162nW, 0.845pJ/step Resistance-to-Digital Converter for Miniature Battery-Powered Sensing Systems – Arnab Dey and Zia Abbas. Research work as explained by the authors:
This paper proposes a 162nW resistance-to-digital converter (RDC) for miniature battery-powered sensing systems. The RDC first converts input resistance to a pulse by charging a capacitor to a threshold voltage with current proportional to the resistance. It compensates for the temperature sensitivity of the charging current by generating the threshold voltage with the same temperature dependency. Then, the circuit digitises the pulse using an up-down counter that cancels temperature dependent delay and offset of the low-power comparator in a digital Correlated Double Sampling (CDS) style. Designed in a 180 nm CMOS process, the proposed circuit achieves a figure-of-merit (FoM) of 0.845pJ/c.s. in simulation, with a conversion time of 50 ms for input resistance from 50kΩ to 1MΩ, while consuming 162nW at a supply voltage of 900 mV. Also, it obtains a temperature sensitivity of 26.9ppm/◦C from -40 to 100◦C. Compared with the state-of-the-art RDCs, this work improves the FoM and temperature sensitivity by 42.91% and 11.52%, respectively.
- A 2.3nW Gate-Leakage Based Sub-Bandgap Voltage Reference with LS of 0.0066\%/V from -40°C to 150°C for Low-Power IoT Systems – Arnab Dey, Bharadwaj S, A Ali, and Zia Abbas. Research work as explained by the authors:
The paper presents a novel nW range gate-leakage based Sub-Bandgap Voltage Reference (sub-BGR) for low-power and high-temperature range IoT applications. It generates a reference voltage of 336mV without incorporating any resistors and operating for a high-temperature range of -40◦C to 150◦C and a supply range of 0.7V-4V. In the temperature and supply ranges mentioned above, the proposed circuit’s power consumption only goes up by 30x and 1.025x, respectively. Designed in a 65nm CMOS process, the proposed architecture achieves an accuracy of 94ppm/◦C. It achieves a line sensitivity of 0.0066%/V for a supply range of 0.7V to 4V and a PSRR of 89dB at DC and 1V supply. The proposed circuit shows a ±3σ-inaccuracy of 4.305% without additional trimming circuits. It occupies only 0.0851mm2 area while consuming only 2.3nW at 27°C and 21.74nW at 150°C for a 0.7V supply.
- A 0.5V, pico-watt, 0.06\%/V / 0.03\%/V low supply sensitive current/voltage reference without using amplifiers and resistors – Bhartipudi Sahishnavi, Sampath, A Ali, Inhee Lee, and Zia Abbas. Research work as explained by the authors:
The paper presents a 0.5V supply, gate leakage based current/voltage reference for ultra-low power IoT and biomedical applications. The references are generated by the proper addition of PTAT and CTAT curves, which are obtained by exploiting the traditional architecture of the beta multiplier and using the body biasing effect. Gate leakage transistors replace the resistors to ensure low power and low area. The circuit doesn’t involve any Op-Amps avoiding the issues of offset that are prominent in these circuits. Implemented in CMOS 90nm technology, the proposed current (voltage) reference achieves a typical accuracy of 34.6ppm/0C (29.68ppm/0C) over a wide temperature range of -55oC to 75oC with typical value 63.32pA(0.35V). Excellent line sensitivity of 0.0318%/V and 0.0576%/V are observed for voltage and current reference, respectively, in a supply range of 0.5V – 2.3V. The area occupied by the total circuit is 0.0096mm2, while the power consumption is 415pW at the typical corner of 27oC and 0.5V supply.
May 2023