The following papers were presented at the 22nd International Symposium on VLSI Design and Test (VDAT)-2018 at Madurai during 28 – 30 June:
- Dr. Zia Abbas presented a paper on LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16nm CMOS Circuits. Authors of the paper are Zia Abbas, A. Zahra and M. Olivieri
- Prateek Gupta, MS by Research in CVEST, ECE presented a paper on Optimal Transistor Sizing of Full-Adder Block to Reduce Standby Leakage Power. Authors of the paper are Prateek Gupta, Shubham Kumar and Zia Abbas.
- Ashfakh Ali, 2nd year Dual Degree student, CVEST, ECE and Arpan Jain,MS by Research made a poster presentation on Voltage Level Adapter Design for High Voltage Swing Applications in CMOS Differential Amplifier. Authors of the paper are Ashfakh Ali, Arpan Jain and Zia Abbas.