Prof. Aditya Ramamoorthy, Professor of Electrical and Computer Engineering and (by courtesy) of Mathematics, Iowa State University gave a talk on Coded Caching Schemes with Reduced Subpacketization from Linear Block Codes on 25 July. His research areas are network information theory, channel coding and signal processing for bioinformatics and nanotechnology. Dr. Ramamoorthy served as an editor for the IEEE Transactions on Communications from 2011 – 2015. He is currently serving as an associate editor for the IEEE Transactions on Information Theory. He is the recipient of the 2012 Iowa State Universityís Early Career Engineering Faculty Research Award, the 2012 NSF CAREER award, and the Harpole-Pentair professorship in 2009 and 2010.
Coded caching is a technique that generalizes conventional caching and promises significant reductions in traffic over caching networks. However, the basic coded caching scheme requires that each file hosted in the server be partitioned into a large number (i.e., the subpacketization level) of non-overlapping subfiles. From a practical perspective, this is problematic as it means that prior schemes are only applicable when the size of the files is extremely large. In this joint work with Li Tang (Iowa State Univ.), Prof. Ramamoorthy proposes coded caching schemes based on combinatorial structures called resolvable designs. These structures can be obtained in a natural manner from linear block codes whose generator matrices possess certain rank properties. Several schemes can be obtained with subpacketization levels substantially lower than the basic scheme at the cost of an increased rate. Depending on the system parameters, his approach allows operation at various points on the subpacketization level vs. rate tradeoff.
More detail on Prof. Aditya Ramamoorthy at http://www.ece.iastate.edu/adityar