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3rd Indian SAT + SMT School

The Third Indian SAT+SMT School was held at IIIT Hyderabad from 6 – 8 December for Ph.D/masters students and academics from Indian colleges/universities, and engineers from the industry. The theme of this years SAT + SMT School was encodings in the solvers.

SAT and SMT solvers are the backbone of a wide range of academic and industrial R&D activities today. These include software and hardware verification, logistics, planning, operations research, non-linear discrete optimization, model counting, etc. Recent developments in the field suggest that these solvers may soon be leveraged in an even wider range of applications that touch almost all aspects of computing. Unfortunately, in India, the technical study of these solvers is limited to a few individuals/groups. This has hampered the growth of research and development in this area, both in the Indian academia and in the Indian industry. To bridge this gap, IIIT-Hyderabad organised a winter school series on SAT+SMT solvers. This school covered basic courses on logic, and tutorials on solvers by eminent scientists and developers from around the world, and latest research and applications centered around these solvers.

Organizers of this school were Venkatesh Choppella, IIIT Hyderabad; Supratik Chakraborty, IIT Bombay; Ashutosh Gupta, IIT Bombay; Saurabh Joshi, IIT Hyderabad and Subodh Sharma, IIT Delhi. For more details visit  http://sat-smt.in