Dheekshith Kumar Akula  supervised by Dr. Zia Abbas received his  Master of Science –  Dual Degree in Electronics and Communication Engineering  (ECD). Here’s a summary of his research work on Low Power Autocalibration Techniques for Energy Efficient IooT:

The world as we know it is constantly shaped by technological innovation, much of which is enabled by advances in semiconductor devices. These devices now play a pivotal role in nearly every field—from consumer electronics to automotive systems and critical infrastructure. As their deployment becomes more widespread and their roles increasingly critical, the need for accurate, reliable, and energy-efficient operation—without compromising on cost—has become a central design challenge. This thesis addresses these concerns by proposing a set of techniques to enhance the robustness, power efficiency, and scalability of current reference circuits. Current References serve as critical building blocks in analog and mixed-signal systems. Hence, their performance directly impacts the efficiency of all the other blocks of the SoC. So designing a robust current reference is critical. Among the many challenges in designing such circuits, achieving ultra-low-power operation while maintaining accuracy, thermal stability, and compact area remains particularly demanding. Conventional approaches often suffer from significant area overhead or exhibit substantial performance drift across temperature and process variations. To address these limitations this work presents a 250pA gate-leakage-based current reference that maintains reliable operation across a wide temperature range and process corners. This is achieved through the integration of temperature compensation and autocalibration techniques. The proposed architecture delivers ultra low power current reference over a wide temperature range across process corners while occupying minimal silicon area, making it well suited for advanced sensors and IoT applications. Building on the idea of calibration, this thesis then proposes an autocalibration algorithm applicable to a poly resistance based current references as an alternative to traditional trimming methods thereby achieving cost effective solution.It is seen that the variations are reduced to ±3.5% post calibration while compared to ±30% pre calibration. Then the focus is on machine learning (ML)-based optimization techniques for analog circuit design. The methodology uses data-driven surrogate modeling to explore the high-dimensional design space efficiently. The approach is verified on a double balanced gilbert mixer cell to calibrate for P1dB and IIP3 parameters.

July 2025