Dr. Zia Abbas and his students published their research work in the following conferences:

IEEE International Symposium on Circuits and Systems (ISCAS) 2019, Sapporo, Japan– PVT Variations Aware Robust Transistor Sizing for Power-Delay Optimal CMOS Digital Circuit Design – Prateek Gupta, Shirisha Gourishetty, Harshini Mandadapu, Zia Abbas

20th International Symposium on Quality Electronic Design (ISQED) 2019, Santa Clara, California, USA (6 – 8 March)  – Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms – Prateek Gupta, Harshini Mandadapu, Shirisha Gourishetty, Zia Abbas

ISQED 2019 is a premier interdisciplinary and multidisciplinary Electronic Design conference. It bridges the gap among electronic/semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology, packaging, assembly and test to achieve total design quality.  The two-day event had tutorials and in-depth sessions. The program also featured embedded information-packed tutorials and keynotes by major industry & academia leaders and experts, and nearly 100 papers highlighting the latest trends in electronic circuit and system design & automation, test, verification, and semiconductor technologies and Interact & network with experts and industry movers and shakers.

15th India Council International Conference 2018, India – Multi-Objective Optimization Algorithm Based Transistor Sizing for Improved Power-Delay-Area in Digital Circuits – Prateek Gupta, Zia Abbas